SiGe BiCMOS FRONT-END CIRCUITS FOR X-BAND PHASED ARRAYS
Electronics Engineering Master Thesis, 2012
Prof. Dr. Yaşar Gürbüz (Thesis Supervisor), Assoc. Prof. İbrahim Tekin, Assoc. Prof. Meriç Özcan, Asst. Prof. Volkan Özgüz, Asst. Prof. Hüsnü Yenigün
Date & Time: June 5th 2012 – 14:00
Place: FENS G032
Keywords: Phased Arrays, T/R module, SiGe BiCMOS, X-Band Integrated Circuits, Low Noise Amplifier, T/R Switch and SPDT Switch.
The current Transmit/Receive (T/R) modules have typically been implemented using GaAs- and InP-based discrete monolithic microwave integrated circuits (MMIC) to meet the high performance requirement of the present X-Band phased arrays. However their cost, size, weight, power consumption and complexity restrict phased array technology only to certain military and satellite applications which can tolerate these limitations. Therefore, next generation X-Band phased array radar systems aim to use low cost, silicon-based fully integrated T/R modules. For this purpose, this thesis explores the design of T/R module front-end building blocks based on new approaches and techniques which can pave the way for implementation of fully integrated X-Band phased array radars in low-cost SiGe BiCMOS process.
The design of a series-shunt CMOS T/R switch with the highest IP1dB, compared to other reported works in the literature is presented. The design focuses on the techniques, primarily, to achieve higher power handling capability (IP1dB), along with higher isolation and better insertion loss of the T/R switch. Also, a new T/R switch was implemented using shunt NMOS transistors and slow-wave quarter wavelength transmission lines. It presents the utilization of slow-wave transmissions lines in T/R switches for the first time in any BiCMOS technology to the date. A fully integrated DC to 20 GHz SPDT switch based on series-shunt topology was demonstrated. The resistive body floating and on-chip impedance transformation networks (ITN) were used to improve power handling of the switch.
An X-Band high performance low noise amplifier (LNA) was implemented in 0.25-µm SiGe BiCMOS process. The LNA consists of inductively degenerated two cascode stages with high speed SiGe HBT devices to achieve low noise figure (NF), high gain and good matching at the input and output, simultaneously. The performance parameters of the LNA collectively constitute the best Figure-of-Merit value reported in similar technologies, to the best of author's knowledge. Furthermore, a switched LNA was implemented SiGe BiCMOS process for the first time at X-Band. Additionally, the resistive body floating technique was incorporated in switched LNA design, for the first time, to improve the linearity of the circuit further in bypass mode.
Finally, a complete T/R module with a state-of-the-art performance was implemented using the individually designed blocks. The simulations result of the T/R module is presented in the dissertation. The state-of-the-art performances of the presented building blocks and the complete module are attributed to the unique design methodologies and techniques.