EE & CS Seminar: Addressing Integrated Circuit Integrity Using Statis...17-01-2020
Speaker: Burçin Çakır, Harvard University
Title: EE & CS Seminar: Addressing Integrated Circuit Integrity Using Statistical Analysis and Machine Learning Techniques
Date/Time: 21 January, 2020 / 12.40-13.30
Place: FENS G032
Abstract: Outsourcing of design and manufacturing processes makes integrated circuits (ICs) vulnerable to adversarial changes and raises concerns about their security and integrity. The difference in the levels of abstraction between the initial specification and the final available circuit design poses a challenge for analyzing the final circuit for malicious insertions.
In this talk, I present a novel approach for the analysis of circuits using graph algorithms and different concepts from linear algebra, signal processing and machine learning techniques to detect malicious insertions and reverse engineer a given IC. Our first study provides a framework to flag the malicious nodes using the simulation results of the chip. The second part of the talk focuses on reverse engineering where I present two algorithms to infer high-level blocks in an untrusted circuit by using a reference behavioral design or a corresponding block diagram accompanied by a natural-language document. Reverse engineering helps reduce the complexity of verification/analysis by partitioning the circuit into smaller parts.
All algorithms have been implemented and demonstrated to be scalable to significant sized ICs. They present valuable insights for reverse engineering digital ICs as well as for Trojan detection.
Bio: Burcin Cakir is a postdoctoral fellow in Electrical Engineering and Computer Science department of Harvard University. She received her B.S. degree in Electrical Engineering from Bilkent University, and her Ph.D. degree from Princeton University. Her research motivation is formulating models that can represent real systems accurately and express mathematical bases/frameworks for further analysis. Currently, she is working on designing hardware accelerator extensions for domain specific machine learning applications and microarchitectural design space exploration. During her PhD, she had experience in developing algorithms and analyses to help design secure hardware systems. She is a recipient of Francis Robbins Upton Fellowship award from Princeton University. Her work on Hardware Trojan detection received Best Paper Award at DATE Conference (2015). She also has served as a referee on various journals and conferences and gave workshop and seminar talks. Recently, she has been selected to Rising Stars 2020 sponsored by the IEEE Solid-State Circuits Society at the International Solid-State Circuits Conference. Besides her work at Princeton, she also had experience in industry research with two internships at Microsoft Research (MSR) in Redmond (WA) and Cambridge (UK) Labs.
Contact: Ersin Göğüş